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交通燈控制器DE1開(kāi)發(fā)板紅綠燈數(shù)碼管倒計(jì)時(shí)verilog

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1-2311011RJ92V.doc

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名稱(chēng):交通燈控制器DE1開(kāi)發(fā)板紅綠燈數(shù)碼管倒計(jì)時(shí)(代碼在文末下載)

軟件:Quartus II

語(yǔ)言:Verilog

代碼功能:

交通燈控制器:

1、實(shí)現(xiàn)一個(gè)十字路口交通燈,每條路有紅綠黃三色信號(hào)燈。

2、使用數(shù)碼管顯示倒計(jì)時(shí)。

3、可通過(guò)代碼修改通行時(shí)間。

通行時(shí)間設(shè)置方法,在頂層模塊找到以下代碼,修改對(duì)應(yīng)值即可

assign?main_yellow_time=8'd5;//主路黃燈時(shí)間設(shè)置為5秒
assign?branch_yellow_time=8'd5;//支路黃燈時(shí)間設(shè)置為5秒
assign?main_green_time=8'd25;//默認(rèn)綠燈25秒
assign?branch_green_time=8'd25;//默認(rèn)綠燈25秒

本代碼已在DE1開(kāi)發(fā)板驗(yàn)證,其他開(kāi)發(fā)板可修改管腳適配,開(kāi)發(fā)板如下:

c1876428-dcfe-4b47-8b84-4479241d10b8.png

演示視頻:

FPGA代碼Verilog/VHDL代碼資源下載:www.hdlcode.com

部分代碼展示:

/*
紅->綠?綠->黃?黃->紅
1、紅--計(jì)時(shí)main_red_times------------------------綠--計(jì)時(shí)main_green_times---main_yellow_times黃燈---------------紅
2、綠--計(jì)時(shí)branch_green_times---branch_yellow_times黃燈--------------------紅--計(jì)時(shí)branch_reg_times-------------------綠
*/
module?traffic_light(
input?clk,//50Mhz
input?SW,
output?R1,//主路燈
output?G1,//主路燈
output?Y1,//主路燈
output?R2,//支路燈
output?G2,//支路燈
output?Y2,//支路燈
output?[7:0]?HEX0,//(主干道)數(shù)碼管0
output?[7:0]?HEX1,//(主干道)數(shù)碼管1
output?[7:0]?HEX2,//(支干道)數(shù)碼管2
output?[7:0]?HEX3//(支干道)數(shù)碼管3
);
?wire?clk_1Hz;
?wire?[7:0]?main_green_BCD;
?wire?[7:0]?main_yellow_BCD;
?wire?[7:0]?main_red_BCD;
?wire?[7:0]?branch_green_BCD;
?wire?[7:0]?branch_yellow_BCD;
?wire?[7:0]?branch_red_BCD;
?wire?[7:0]?main_data_out;
?wire?[7:0]?branch_data_out;
?
wire?main_red_led;//主路燈
wire?main_green_led;//主路燈
wire?main_yellow_led;//主路燈
wire?branch_red_led;//支路燈
wire?branch_green_led;//支路燈
wire?branch_yellow_led;//支路燈
assign?R1=main_red_led;//主路燈
assign?G1=main_green_led;//主路燈
assign?Y1=main_yellow_led?;//主路燈
assign?R2=branch_red_led;//支路燈
assign?G2=branch_green_led;//支路燈
assign?Y2=branch_yellow_led?;//支路燈?
//分頻模塊
div?div100
(
.?clk(clk),
.?clk_out(clk_1Hz)
);
//兩邊周期一樣,紅燈時(shí)間30秒,綠燈時(shí)間25秒,黃燈時(shí)間5秒
//按鍵調(diào)整時(shí)間
wire?[7:0]main_green_time;//
wire?[7:0]main_yellow_time;
wire?[7:0]branch_green_time;
wire?[7:0]branch_yellow_time;
assign?main_yellow_time=8'd5;//主路黃燈時(shí)間設(shè)置為5秒
assign?branch_yellow_time=8'd5;//支路黃燈時(shí)間設(shè)置為5秒
assign?main_green_time=8'd25;//默認(rèn)綠燈25秒
assign?branch_green_time=8'd25;//默認(rèn)綠燈25秒
///////////////////////////////
////////////////////////////////
//交通燈控制模塊
led?led(
.?clk_1Hz(clk_1Hz),
.?SW(SW),
.?main_red(main_red_led),//主路燈
.?main_green(main_green_led),//主路燈
.?main_yellow(main_yellow_led),//主路燈
.?branch_red(branch_red_led),//支路燈
.?branch_green(branch_green_led),//支路燈
.?branch_yellow(branch_yellow_led),//支路燈
.?main_green_time(main_green_time),
.?main_yellow_time(main_yellow_time),
.?branch_green_time(branch_green_time),
.?branch_yellow_time(branch_yellow_time),
.?main_green_BCD(main_green_BCD),//綠燈時(shí)間計(jì)數(shù)
.?main_yellow_BCD(main_yellow_BCD),//黃燈時(shí)間計(jì)數(shù)
.?main_red_BCD(main_red_BCD),//紅燈時(shí)間計(jì)數(shù)
.?branch_green_BCD(branch_green_BCD),//綠燈時(shí)間計(jì)數(shù)
.?branch_yellow_BCD(branch_yellow_BCD),//黃燈時(shí)間計(jì)數(shù)
.?branch_red_BCD(branch_red_BCD)//紅燈時(shí)間計(jì)數(shù)
);
//顯示數(shù)據(jù)生成模塊
shumaguan_data?shumaguan_data(
.?clk(clk),
.?main_red(main_red_led),//主路燈
.?main_green(main_green_led),//主路燈
.?main_yellow(main_yellow_led),//主路燈
.?branch_red(branch_red_led),//支路燈
.?branch_green(branch_green_led),//支路燈
.?branch_yellow(branch_yellow_led),//支路燈
.?main_green_BCD(main_green_BCD),//綠燈時(shí)間計(jì)數(shù)
.?main_yellow_BCD(main_yellow_BCD),//黃燈時(shí)間計(jì)數(shù)
.?main_red_BCD(main_red_BCD),//紅燈時(shí)間計(jì)數(shù)
.?branch_green_BCD(branch_green_BCD),//綠燈時(shí)間計(jì)數(shù)
.?branch_yellow_BCD(branch_yellow_BCD),//黃燈時(shí)間計(jì)數(shù)
.?branch_red_BCD(branch_red_BCD),//紅燈時(shí)間計(jì)數(shù)
.?main_green_time(main_green_time),
.?main_yellow_time(main_yellow_time),
.?branch_green_time(branch_green_time),
.?branch_yellow_time(branch_yellow_time),
.?main_data_out(main_data_out),//主路數(shù)碼管數(shù)據(jù)顯示
.?branch_data_out(branch_data_out)//支路數(shù)碼管數(shù)據(jù)顯示
);
display?display
(
.?clk(clk),
.?SMG_1(main_data_out),//主路數(shù)碼管數(shù)據(jù)顯示
.?SMG_2(branch_data_out),//支路數(shù)碼管數(shù)據(jù)顯示
.?HEX0(HEX0),//(主干道)數(shù)碼管0
.?HEX1(HEX1),//(主干道)數(shù)碼管1
.?HEX2(HEX2),//(支干道)數(shù)碼管2
.?HEX3(HEX3)//(支干道)數(shù)碼管3
);
endmodule

設(shè)計(jì)文檔:

1. 工程文件

2. 程序文件

3. 程序編譯

4. RTL圖

5. 管腳分配

6. Testbench

7. 仿真圖

點(diǎn)擊鏈接獲取代碼文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=248

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