Quartus十字路口的交通燈verilog代碼FPGA實驗底板

名稱：Quartus十字路口的交通燈verilog代碼FPGA實驗底板

軟件：Quartus

語言：Verilog

代碼功能：

十字路口的交通燈

使用如下代碼在quartus軟件工具用Verilog編寫程序modelsim平臺仿真，設(shè)計一個十字路口的交通燈，一個周期內(nèi)，紅燈發(fā)光30s，綠燈發(fā)光27s，黃燈發(fā)光3s。紅燈發(fā)光期間，數(shù)碼管上顯示的數(shù)字要從29遞減到0；綠燈發(fā)光期間，數(shù)碼管上顯示的數(shù)字要從26遞減到0；黃燈發(fā)光的期間，數(shù)碼管上顯示的數(shù)字要從2遞減到0。

本代碼已在開發(fā)板驗證，開發(fā)板資料如下：（把FPGA實驗底板.pdf和FPGA實驗系統(tǒng)資源.xlsx兩個文件上傳作為開發(fā)板資料）

FPGA代碼Verilog/VHDL代碼資源下載：www.hdlcode.com

演示視頻：

設(shè)計文檔：

1. 工程文件

2. 程序文件

3. 程序編譯

4. RTL圖

狀態(tài)圖

5. 管腳分配

6. Testbench

7. 仿真圖

整體仿真圖

分頻模塊

交通燈控制模塊

倒計時模塊

數(shù)碼管控制模塊

部分代碼展示:

紅->綠?綠->黃?黃->紅
1、紅--計時main_red_times------------------------綠--計時main_green_times---main_yellow_times黃燈---------------紅
2、綠--計時branch_green_times---branch_yellow_times黃燈--------------------紅--計時branch_reg_times-------------------綠
*/
//設(shè)東西為主路，南北為支路
module?traffic_light(
input?clk,//50Mhz
output?main_red,//主路燈
output?main_green,//主路燈
output?main_yellow,//主路燈
output?branch_red,//支路燈
output?branch_green,//支路燈
output?branch_yellow,//支路燈
output?[7:0]?HEX0,//（主干道）數(shù)碼管0
output?[7:0]?HEX1,//（主干道）數(shù)碼管1
output?[7:0]?HEX2,//（支干道）數(shù)碼管2
output?[7:0]?HEX3//（支干道）數(shù)碼管3
);
?wire?clk_1Hz;
?wire?[7:0]?main_green_BCD;
?wire?[7:0]?main_yellow_BCD;
?wire?[7:0]?main_red_BCD;
?wire?[7:0]?branch_green_BCD;
?wire?[7:0]?branch_yellow_BCD;
?wire?[7:0]?branch_red_BCD;
?wire?[7:0]?main_data_out;
?wire?[7:0]?branch_data_out;
?
wire?main_red_led;//主路燈
wire?main_green_led;//主路燈
wire?main_yellow_led;//主路燈
wire?branch_red_led;//支路燈
wire?branch_green_led;//支路燈
wire?branch_yellow_led;//支路燈
wire?main_yellow_flag;
wire?branch_yellow_flag;
assign?main_red=main_red_led;//主路燈
assign?main_green=main_green_led;//主路燈
assign?branch_red=branch_red_led;//支路燈
assign?branch_green=branch_green_led;//支路燈
assign?main_yellow=main_yellow_led;
assign?branch_yellow=branch_yellow_led;
//分頻模塊
div?div100
(
.?clk(clk),
.?clk_out(clk_1Hz)
);
//調(diào)整時間
wire?[7:0]main_green_time;//由外部控制
wire?[7:0]main_yellow_time;
wire?[7:0]branch_green_time;//由外部控制
wire?[7:0]branch_yellow_time;
//紅燈發(fā)光30s，綠燈發(fā)光27s，黃燈發(fā)光3s。紅燈發(fā)光期間，數(shù)碼管上顯示的數(shù)字要從29遞減到0；
//綠燈發(fā)光期間，數(shù)碼管上顯示的數(shù)字要從26遞減到0；黃燈發(fā)光的期間，數(shù)碼管上顯示的數(shù)字要從2遞減到0
assign?main_yellow_time=8'd3;//主路黃燈時間設(shè)置為3秒
assign?branch_yellow_time=8'd3;//支路黃燈時間設(shè)置為3秒
assign?main_green_time=8'd27;//主路綠燈27秒
assign?branch_green_time=8'd27;//支路綠燈27秒
///////////////////////////////
reg?[7:0]?display_main;
reg?[7:0]?display_branch;
////////////////////////////////
//交通燈控制模塊
led?led(
.?clk_1Hz(clk_1Hz),
.?main_red(main_red_led),//主路燈
.?main_green(main_green_led),//主路燈
.?main_yellow(main_yellow_led),//主路燈
.?branch_red(branch_red_led),//支路燈
.?branch_green(branch_green_led),//支路燈
.?branch_yellow(branch_yellow_led),//支路燈
.?main_green_time(main_green_time),
.?main_yellow_time(main_yellow_time),
.?branch_green_time(branch_green_time),
.?branch_yellow_time(branch_yellow_time),
.?main_yellow_flag(main_yellow_flag),
.?branch_yellow_flag(branch_yellow_flag),
.?main_green_BCD(main_green_BCD),//綠燈時間計數(shù)
.?main_yellow_BCD(main_yellow_BCD),//黃燈時間計數(shù)
.?main_red_BCD(main_red_BCD),//紅燈時間計數(shù)
.?branch_green_BCD(branch_green_BCD),//綠燈時間計數(shù)
.?branch_yellow_BCD(branch_yellow_BCD),//黃燈時間計數(shù)
.?branch_red_BCD(branch_red_BCD)//紅燈時間計數(shù)
);
//顯示數(shù)據(jù)生成模塊
shumaguan_data?shumaguan_data(
.?clk(clk),
.?main_red(main_red_led),//主路燈
.?main_green(main_green_led),//主路燈
.?main_yellow(main_yellow_led),//主路燈
.?branch_red(branch_red_led),//支路燈
.?branch_green(branch_green_led),//支路燈
.?branch_yellow(branch_yellow_led),//支路燈
.?main_green_BCD(main_green_BCD),//綠燈時間計數(shù)
.?main_yellow_BCD(main_yellow_BCD),//黃燈時間計數(shù)
.?main_red_BCD(main_red_BCD),//紅燈時間計數(shù)
.?branch_green_BCD(branch_green_BCD),//綠燈時間計數(shù)
.?branch_yellow_BCD(branch_yellow_BCD),//黃燈時間計數(shù)
.?branch_red_BCD(branch_red_BCD),//紅燈時間計數(shù)
.?main_green_time(main_green_time),
.?main_yellow_time(main_yellow_time),
.?branch_green_time(branch_green_time),
.?branch_yellow_time(branch_yellow_time),
.?main_data_out(main_data_out),//主路數(shù)碼管數(shù)據(jù)顯示
.?branch_data_out(branch_data_out)//支路數(shù)碼管數(shù)據(jù)顯示
);
display?display
(
.?clk(clk),
.?SMG_1(main_data_out),//主路數(shù)碼管數(shù)據(jù)顯示
.?SMG_2(branch_data_out),//支路數(shù)碼管數(shù)據(jù)顯示
.?HEX0(HEX0),//（主干道）數(shù)碼管0
.?HEX1(HEX1),//（主干道）數(shù)碼管1
.?HEX2(HEX2),//（支干道）數(shù)碼管2
.?HEX3(HEX3)//（支干道）數(shù)碼管3
);
endmodule

點擊鏈接獲取代碼文件：http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=413